• Conference
    Jan 30-Feb 1, 2018
  • Expo
    Jan 31-Feb 1, 2018
  • Santa Clara Convention
    Center 
    | Santa Clara, CA

Training Boot Camps

Recognizing that many are new to the concepts of signal integrity or PCB fabrication, DesignCon has assembled some of the most respected instructors in their field to hold all-day boot camps on these two topics. If you need to brush up your basics or get up to speed fast, sign up for one of the DesignCon 2017 boot camp options today!

Boot Camps run all day on Tuesday, January 31, with a mid-day break for the keynote and lunch. The Boot Camp sessions will conclude at 4:30, and all Boot Camp attendees are then welcome to join the afternoon panel discussion of their choice.

PRAGMATIC SIGNAL INTEGRITY


TUESDAY, JANUARY 31, 9AM-6PM

Are you intrigued by the advanced signal integrity topics covered at DesignCon but feel you need a bit more to get up to speed? Then, the DesignCon 2017 Pragmatic Signal Integrity Boot Camp is for you. Led by long-time signal integrity expert and 2015 DesignCon Engineer of the Year Michael Steinberger, this boot camp is designed to give experienced engineers the knowledge they need about signal integrity and introduce new engineers to the concept.

A typical signal integrity project can involve a dozen or more models of several different types and involve at least three different analysis/simulation methods. Through interactive demonstration of the development of a typical SI project, this tutorial offers attendees the disciplines needed to manage this complexity and consistently produce trustworthy results. This tutorial emphasizes the typical problems encountered, with each problem solved as a class exercise. Get your pass.

The principles of pragmatic SI to be presented are

  1. Understand the Physics. Understand what’s going on physically in the high speed serial channel. Understand how the models used in the SI analysis reflect these physical phenomena. Use only models which reflect what’s actually going on in the channel.
  2. Build the project step by step. Start with small pieces and simple phenomena and build incrementally to more complex assemblies and phenomena. Verify the modeling at each stage and only progress to the next stage once you understand what you have so far.
  3. Know what you expect. Eric Bogatin’s Rule #9: Before performing any measurement or simulation, perform whatever calculations or estimates are needed to know what you expect the results to look like.
  4. Use controlled experiments. Solve problems using controlled experiments. That is, enumerate your hypotheses and then test each one by starting with a baseline measurement and then measuring the change due to a single change to the baseline.
  5. Correlate results. Correlate results of analyses and simulations back to data measured on the real hardware. This is an ongoing process and not a single event.

These principles are presented at the beginning of the tutorial and then demonstrated throughout the development of a typical SI project. The three primary phases of the project are:

  1. Network Characterization
  2. Statistical Analysis
  3. Time Domain Simulation

For each phase of the project, the fundamental knowledge needed to execute the phase will be followed by a description of the steps to be followed. We will then execute this phase for the SI project to be developed over the course of the tutorial. In each phase, we will encounter problems due to the models or methods used, and the solution of these problems will be an interactive exercise for the class.

PCB Fabrication and Materials


TUESDAY, JANUARY 31, 9AM-6PM

The printed circuit board (PCB) is used in all but the simplest electronic products and is of course familiar to any engineer. If you would like to learn more about the fabrication process and material options in PCB creation, this PCB Fabrication and Materials Boot Camp is for you. Led by Lee Ritchey, one of the industry’s premier authorities on high-speed PCB and systems design, this boot camp will cover PCB laminate manufacture and properties, fabrication, and details of designing PCB stackups for various market segments. Get your pass.

Today’s high-speed PCBs, with their inherent signal integrity and power delivery requirements, make it necessary to employ far more discipline in the choice of materials and the arrangement of layers in the stackup. These requirements are outside the skill set of most PCB fabricators. The objective of this session is to guide the design engineer through the process of evaluating and selecting the right laminate for any given design and then designing a PCB stackup that meets the numerous requirements of a complex, multilayer board that works right the first time.

With the very high data rates being designed into current products, such as PCIe Gen3, 32 Gb/S links and other very fast signaling protocols, it is imperative that design engineers have a good working knowledge of how laminates are manufactured. This has become especially important as designs are prototyped in one place and manufactured in another where the laminates sources can differ greatly.

Because of all these requirements, the design engineer needs to take charge of material selection and the designing the PCB stackup to insure impedance, skew, cross talk and power delivery goals are met.

This session is divided into three parts:

  • How laminates are manufactured
  • How PCBs are fabricated
  • How to design a PCB stackup that optimizes laminate choice and fabrication

Section 1 is a thorough treatment of how laminate is manufactured and what an engineer can expect from each class of laminates.

Section 2 discusses in detail the three methods of laminating printed circuit boards: Cap lamination, foil lamination and build up lamination, and how each fills a particular performance need.

Section 3 is a thorough treatment of PCB stackup design including accounting for weave induced skew and copper surface roughness. This section also includes how to get the necessary electrical specifications (loss tangent, dielectric constant and weave style) needed by the design process as well as impedance calculating tools available for this task.